Silicon Labs /EFR32MG21A020F768IM32 /RAC_S /AUXADCTRIM

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Interpret as AUXADCTRIM

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disable_Invert)AUXADCCLKINVERT 0 (TRIM1p27)AUXADCLDOVREFTRIM 0 (Disabled)AUXADCOUTPUTINVERT 0AUXADCRCTUNE 0 (RES200k)AUXADCTRIMADCINPUTRES 0 (Typ_minus_40pct)AUXADCTRIMCURRINPUTBUF 0 (Typ_minus_40pct)AUXADCTRIMCURROPA1 0 (Typ_minus_40pct)AUXADCTRIMCURROPA2 0 (Typ_minus_40pct)AUXADCTRIMCURRREFBUF 0 (Typ_minus_40pct)AUXADCTRIMCURRTSENSE 0 (Typ_minus_40pct)AUXADCTRIMCURRVCMBUF 0 (LowCurrentMode)AUXADCTRIMLDOHIGHCURRENT 0 (REF1p05)AUXADCTRIMREFP 0 (Trim0p6)AUXADCTRIMVREFVCM 0 (VBE_16uA)AUXADCTSENSETRIMVBE2

AUXADCTRIMCURRINPUTBUF=Typ_minus_40pct, AUXADCTRIMCURROPA2=Typ_minus_40pct, AUXADCOUTPUTINVERT=Disabled, AUXADCTRIMADCINPUTRES=RES200k, AUXADCTRIMLDOHIGHCURRENT=LowCurrentMode, AUXADCTRIMCURRVCMBUF=Typ_minus_40pct, AUXADCLDOVREFTRIM=TRIM1p27, AUXADCTRIMCURRREFBUF=Typ_minus_40pct, AUXADCTSENSETRIMVBE2=VBE_16uA, AUXADCTRIMREFP=REF1p05, AUXADCTRIMVREFVCM=Trim0p6, AUXADCTRIMCURROPA1=Typ_minus_40pct, AUXADCTRIMCURRTSENSE=Typ_minus_40pct, AUXADCCLKINVERT=Disable_Invert

Fields

AUXADCCLKINVERT

AUXADCCLKINVERT

0 (Disable_Invert): undefined

1 (Enable_Invert): undefined

AUXADCLDOVREFTRIM

AUXADCLDOVREFTRIM

0 (TRIM1p27): undefined

1 (TRIM1p3): undefined

2 (TRIM1p35): undefined

3 (TRIM1p4): undefined

AUXADCOUTPUTINVERT

AUXADCOUTPUTINVERT

0 (Disabled): undefined

1 (Enabled): undefined

AUXADCRCTUNE

AUXADCRCTUNE

AUXADCTRIMADCINPUTRES

AUXADCTRIMADCINPUTRES

0 (RES200k): undefined

1 (RES250k): undefined

2 (RES300k): undefined

3 (RES350k): undefined

AUXADCTRIMCURRINPUTBUF

AUXADCTRIMCURRINPUTBUF

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMCURROPA1

AUXADCTRIMCURROPA1

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMCURROPA2

AUXADCTRIMCURROPA2

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMCURRREFBUF

AUXADCTRIMCURRREFBUF

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMCURRTSENSE

AUXADCTRIMCURRTSENSE

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMCURRVCMBUF

AUXADCTRIMCURRVCMBUF

0 (Typ_minus_40pct): undefined

1 (Typ_minus_20pct): undefined

2 (Typ): undefined

3 (Typ_plus_20pct): undefined

AUXADCTRIMLDOHIGHCURRENT

AUXADCTRIMLDOHIGHCURRENT

0 (LowCurrentMode): undefined

1 (HighCurrentMode): undefined

AUXADCTRIMREFP

AUXADCTRIMREFP

0 (REF1p05): undefined

1 (REF1p16): undefined

2 (REF1p2): undefined

3 (REF1p25): undefined

AUXADCTRIMVREFVCM

AUXADCTRIMVREFVCM

0 (Trim0p6): undefined

1 (Trim0p65): undefined

2 (Trim0p7): undefined

3 (Trim0p75): undefined

AUXADCTSENSETRIMVBE2

AUXADCTSENSETRIMVBE2

0 (VBE_16uA): undefined

1 (VBE_32uA): undefined

Links

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